A Serializer/Deserializer (SERDES) is a pair of circuit blocks commonly used in high speed data communications. SERDES converts data between serial format and parallel format in transmit (TX) direction and receive (RX) direction. The basic SERDES function typically includes a Parallel-to-Serial converter for TX direction and a Serial-to-Parallel converter for RX direction. Based on the use of a SERDES, high speed data may be communicated via a pair of unidirectional point-to-point serial links commonly referred to as a lane.
The Parallel-to-Serial converter typically has a parallel clock input and a set of parallel data inputs. A Phase-Locked Loop (PLL) may be used to multiply the incoming parallel clock up to the higher serial clock rate. Alternatively, the serial clock may be externally supplied. Throughout this document, the term “clock” and “clock signal” may be used interchangeably depending on the context. One example of the Parallel-to-Serial converter may have a single shift register that receives the parallel data once per parallel clock cycle and shifts the serial data out at the higher serial clock rate. Other examples may use a double-buffer configuration.
The Serial-to-Parallel converter typically has a parallel clock output and a set of parallel data outputs. A high speed clock may be recovered using serial clock recovery technique. The Serial-to-Parallel converter then divides the recovered clock down to the parallel clock rate. Alternatively, the serial clock and parallel clock may be externally supplied. One example of the Serial-to-Parallel converter may have a double-buffer configuration of registers. One register is used to shift in the serial data stream at the higher serial clock rate, and the other register is used to hold valid parallel data outputs at the slower parallel clock rate.
Generally speaking, tests are applied in the manufacturing process for electronic circuits (e.g., a circuit including SERDES blocks). In some scenarios, tests may also be used for field maintenance in the customer environment. The tests are generally performed using an Automatic Test Equipment (ATE) or, for example in the case of field maintenance, using built-in self-test (BIST) functionality within the circuit itself. A load board, sometime referred to as interface board or DUT (device under test) board, is a circuit board designed to serve as an interface circuit between the ATE instruments and the device under test (DUT).
Design for Test (DFT) is a design technique that adds testability features to an electronic circuit design. DFT may use a test pattern generator, such as a pseudorandom number generator (PRNG), to generate input test patterns for testing purposes. An example PRNG uses a linear feedback shift register (LFSR), which is a shift register with an input as a linear function of a previous state of the shift register. For example, an input bit of the LFSR may be driven by the exclusive-or (XOR) function based on some parallel output bits of the LFSR.
Jitter is an unwanted variation of certain characteristics of a periodic signal in electronic circuits. Jitter may be present in characteristics such as amplitude, frequency, periodic rate, or phase of successive signal cycles. Jitter is sometimes referred to as timing jitter in clock recovery applications.